This work proposes novel ultralow-power system and circuit designs and trade-offs on the analog front-end integrated circuit (IC) for an implantable cardioverter defibrillators (ICD). The major front-end analog IC includes pre-amplifier, filters, variable-gain-amplifier (VGA) and analog-to-digital converter (ADC). The pre-amplifier is designed with low-noise bipolar (BJT) transistors; filters are designed with both the switch-capacitor (SC) and the g m-C topology for comparison. The VGA includes a high-pass filter (HPF) and a DC shifter designed with a differential difference amplifier (DDA). A successive-approximation-register (SAR) ADC with a novel digital-to-analog converter (DAC) design is used to digitize signals and to reduce SAR ADC's input capacitance by half. The preliminary SPICE simulation of the entire front-end IC suggests it can effectively filter out undesired T-wave in patients' electrogram (EGM) to enable proper heartbeat detection.