This paper proposes some novel ultralow-power system and circuit designs and trade-offs on the analog front-end integrated circuit (IC) for an implantable cardioverter defibrillators (ICD). The major front-end analog IC components include low-power pre-amplifier, filters, a variable-gain-amplifier (VGA) and an Analog-to-Digital Converter (ADC). We avoided the use of clock signals in the analog IC design (except in the ADC) to reduce the common-mode and switching noise as much as possible. Therefore, the pre-amplifier is designed with low-noise bipolar transistors, rather than using chopper or auto-zero techniques; the filters are designed with the gm-C topology. The VGA includes a high-pass filter (HPF) and a DC shifter designed with a differential difference amplifier (DDA). An ultralow-power successive-approximation-register (SAR) ADC with a novel DAC design is used to digitize signals and to reduce SAR ADC's input capacitance by half. SPICE simulation results of each circuit block and of the entire front-end IC demonstrate that the ultralow-power analog front-end circuitry can effectively filter out the undesired T-wave in patients' electrogram (EGM) to enable proper heartbeat detection in the ICD.