Storage-efficient data prefetching for high performance computing

Yong Chen, Huaiyu Zhu, Hui Jin, Xian He Sun

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review


Data prefetching is widely adopted in modern high performance processors to bridge the ever-increasing performance gap between processor and memory. Many prefetching techniques have been proposed to exploit patterns among data access history that is stored in on-chip hardware table. We demonstrate that the table size has considerable impact on the performance of data prefetching. While a small table size limits the effectiveness of the prediction due to inadequate history, a large table is expensive to be implemented on-chip and has longer latency. It is critical to find a storage-efficient data prefetching mechanism. We propose a novel Dynamic Signature Method (DSM) that stores the addresses efficiently to reduce the demand of storage for prefetching. We have carried out extensive simulation testing with a trace-driven simulator, CMP$im, and SPEC CPU2006 benchmarks. Experimental results show that the new DSM based prefetcher achieved better performance improvement for over half benchmarks compared to the existing prefetching approaches with the same storage consumption.

Original languageEnglish
Title of host publicationFuture Information Technology, Application, and Service, FutureTech 2012
Number of pages10
EditionVOL. 1
StatePublished - 2012
Event7th FTRA International Conference on Future Information Technology, FutureTech 2012 - Vancouver, BC, Canada
Duration: Jun 26 2012Jun 28 2012

Publication series

NameLecture Notes in Electrical Engineering
NumberVOL. 1
Volume164 LNEE
ISSN (Print)1876-1100
ISSN (Electronic)1876-1119


Conference7th FTRA International Conference on Future Information Technology, FutureTech 2012
CityVancouver, BC


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