TY - JOUR
T1 - Physics-based simulation of 4H-SIC DMOSFET structure under inductive switching
AU - Pushpakaran, Bejoy N.
AU - Bayne, Stephen B.
AU - Ogunniyi, Aderinto A.
N1 - Publisher Copyright:
© 2015, Springer Science+Business Media New York.
PY - 2016/3/1
Y1 - 2016/3/1
N2 - The integration of high power silicon carbide (SiC) Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) in today’s power systems drives the demand for deeper understanding of the device switching characteristics by way of device simulation. Applications like motor drive require power MOSFETs to drive highly inductive loads which increase the switching power loss by extending the voltage and current crossover, a situation which gets exacerbated by the presence of parasitic inductance. A 2D model of a 1200 V 4H-SiC vertical DMOSFET half-cell was developed using a commercially available TCAD software package to investigate the electro-thermal switching characteristics using clamped inductive switching circuit for ON state drain current density values up to (Formula presented.) at an ambient lattice temperature of 300 K. Device physics-based models were included to account for carrier mobility, carrier generation and recombination, impact ionization and lattice heating. In order to analyze the areas of localized lattice heating, the lattice temperature distribution was monitored during simulation. The clamped inductive switching circuit simulations were performed with and without the addition of parasitic electrode inductance to observe the difference in switching energy loss.
AB - The integration of high power silicon carbide (SiC) Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) in today’s power systems drives the demand for deeper understanding of the device switching characteristics by way of device simulation. Applications like motor drive require power MOSFETs to drive highly inductive loads which increase the switching power loss by extending the voltage and current crossover, a situation which gets exacerbated by the presence of parasitic inductance. A 2D model of a 1200 V 4H-SiC vertical DMOSFET half-cell was developed using a commercially available TCAD software package to investigate the electro-thermal switching characteristics using clamped inductive switching circuit for ON state drain current density values up to (Formula presented.) at an ambient lattice temperature of 300 K. Device physics-based models were included to account for carrier mobility, carrier generation and recombination, impact ionization and lattice heating. In order to analyze the areas of localized lattice heating, the lattice temperature distribution was monitored during simulation. The clamped inductive switching circuit simulations were performed with and without the addition of parasitic electrode inductance to observe the difference in switching energy loss.
KW - Clamped inductive switching
KW - Electro-thermal simulation
KW - Lattice heating
KW - Power DMOSFET
KW - Silicon carbide
KW - Silvaco ATLAS TCAD
UR - http://www.scopus.com/inward/record.url?scp=84959367411&partnerID=8YFLogxK
U2 - 10.1007/s10825-015-0766-1
DO - 10.1007/s10825-015-0766-1
M3 - Article
AN - SCOPUS:84959367411
SN - 1569-8025
VL - 15
SP - 191
EP - 199
JO - Journal of Computational Electronics
JF - Journal of Computational Electronics
IS - 1
ER -