TY - GEN
T1 - Modeling and optimization of fast-settling time gain-boosted cascode CMOS amplifiers
AU - Yang, Yi
AU - Binkley, David M.
AU - Li, Changzhi
PY - 2010
Y1 - 2010
N2 - Settling time is a very critical performance requirement for CMOS amplifiers in switched-capacitor circuits. The settling mechanism of gain-boosted amplifiers is very complicated. In this paper, the small-signal model for the gain-boosted cascode amplifier is analyzed. The gain bandwidth product and phase margin optimum values for the gain boosting amplifiers used inside gain-boosted cascode amplifiers are given for the minimum settling time. Finally, we present a low-voltage, high-gain and fast-settling time CMOS amplifier.
AB - Settling time is a very critical performance requirement for CMOS amplifiers in switched-capacitor circuits. The settling mechanism of gain-boosted amplifiers is very complicated. In this paper, the small-signal model for the gain-boosted cascode amplifier is analyzed. The gain bandwidth product and phase margin optimum values for the gain boosting amplifiers used inside gain-boosted cascode amplifiers are given for the minimum settling time. Finally, we present a low-voltage, high-gain and fast-settling time CMOS amplifier.
KW - Gain boosting amplifier
KW - Gain-boosted amplifier
KW - Settling time
KW - Switched-capacitor circuit
UR - http://www.scopus.com/inward/record.url?scp=77952685814&partnerID=8YFLogxK
U2 - 10.1109/SECON.2010.5453927
DO - 10.1109/SECON.2010.5453927
M3 - Conference contribution
AN - SCOPUS:77952685814
SN - 9781424458530
T3 - Conference Proceedings - IEEE SOUTHEASTCON
SP - 33
EP - 36
BT - IEEE SoutheastCon 2010
T2 - IEEE SoutheastCon 2010 Conference: Energizing Our Future
Y2 - 18 March 2010 through 21 March 2010
ER -