HMC-Sim-2.0: A simulation platform for exploring custom memory cube operations

John D. Leidel, Yong Chen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

14 Scopus citations

Abstract

The recent advent of stacked memory devices has led to a resurgence of researchassociated with the fundamental memory hierarchy and associated memory pipeline. The bandwidth advantages provided by stacked logic and DRAM devices haveinspired research associated with eliminating the bandwidth bottlenecksassociated with many applications in high performance computing. Further, recent efforts have focused on utilizing stacked memory devices as last-levelcaches. In addition to the two aforementioned focus areas, a third area of research isemerging to explore augmenting the stacked memory logic layer with additionaloperations. This first generation of Hybrid Memory Cube (HMC) devices providedrudimentary atomic memory operations. The Gen2 Hybrid Memory Cube devicesprovide more expressive atomic memory operations that include primitiveinteger arithmetic operations. Despite the inclusion of more expressivearithmetic operations, many users have expressed interest in more complex andpotentially orthogonal custom memory cube, or CMC, operations in futurerevisions of the Hybrid Memory Cube specification. This work presents recent development associated with the HMC-Sim Hybrid MemoryCube simulation framework that provides users a powerful infrastructure toexperiment and research augmented custom memory cube, or CMC, operations withinthe current Gen2 Hybrid Memory Cube device infrastructure. We provide anoverview of extending the original HMC-Sim simulation infrastructure to includesupport for CMC operations with requiring users to modify the core simulationcode base. We also present three examples of building and utilizing custom, user-defined CMC operations in sample simulations to exhibit potentialapplication speedup with future HMC device specifications. In doing so, we presenta model to replace traditional thread mutexes with custom HMC mutex commands.

Original languageEnglish
Title of host publicationProceedings - 2016 IEEE 30th International Parallel and Distributed Processing Symposium, IPDPS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages621-630
Number of pages10
ISBN (Electronic)9781509021406
DOIs
StatePublished - Jul 18 2016
Event30th IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2016 - Chicago, United States
Duration: May 23 2016May 27 2016

Publication series

NameProceedings - 2016 IEEE 30th International Parallel and Distributed Processing Symposium, IPDPS 2016

Conference

Conference30th IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2016
Country/TerritoryUnited States
CityChicago
Period05/23/1605/27/16

Keywords

  • Custom Memory Cube
  • Hybrid Memory Cube
  • Simulation

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