Highly efficient 5G linear power amplifiers (PA) design challenges

D. Y.C. Lie; J. C. Mayeda; J. Lopez

doi:10.1109/VLSI-DAT.2017.7939653

Highly efficient 5G linear power amplifiers (PA) design challenges

D. Y.C. Lie, J. C. Mayeda, J. Lopez

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

19 Scopus citations

Abstract

The incoming 5G revolution will dramatically increase the design complexity for handsets and communication infrastructures, demanding the RFIC and ASIC chipsets designers, network and system components vendors and telecom operators to provide viable 5G E2E (End-to-End) products and solutions before A.D. 2020. The broadband modulation bandwidth for RF transmitters (i.e., 250 MHz to above 1 GHz), stringent linearity, and power efficiency requirements at the cm-Wave/mm-Wave 5G frequencies will make it particularly challenging for highly efficient linear 5G power amplifier (PA) design. We will briefly address two major design challenges and solutions for 5G PA design here, namely the device technology choices and efficiency enhancement techniques.

Original language	English
Title of host publication	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509039692
DOIs	https://doi.org/10.1109/VLSI-DAT.2017.7939653
State	Published - Jun 5 2017
Event	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 - Hsinchu, Taiwan, Province of China Duration: Apr 24 2017 → Apr 27 2017

Publication series

Name	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017

Conference

Conference	2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	04/24/17 → 04/27/17

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10.1109/VLSI-DAT.2017.7939653

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Lie, D. Y. C., Mayeda, J. C., & Lopez, J. (2017). Highly efficient 5G linear power amplifiers (PA) design challenges. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 Article 7939653 (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT.2017.7939653

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abstract = "The incoming 5G revolution will dramatically increase the design complexity for handsets and communication infrastructures, demanding the RFIC and ASIC chipsets designers, network and system components vendors and telecom operators to provide viable 5G E2E (End-to-End) products and solutions before A.D. 2020. The broadband modulation bandwidth for RF transmitters (i.e., 250 MHz to above 1 GHz), stringent linearity, and power efficiency requirements at the cm-Wave/mm-Wave 5G frequencies will make it particularly challenging for highly efficient linear 5G power amplifier (PA) design. We will briefly address two major design challenges and solutions for 5G PA design here, namely the device technology choices and efficiency enhancement techniques.",

author = "Lie, {D. Y.C.} and Mayeda, {J. C.} and J. Lopez",

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Lie, DYC, Mayeda, JC & Lopez, J 2017, Highly efficient 5G linear power amplifiers (PA) design challenges. in 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017., 7939653, 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Institute of Electrical and Electronics Engineers Inc., 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, Province of China, 04/24/17. https://doi.org/10.1109/VLSI-DAT.2017.7939653

Highly efficient 5G linear power amplifiers (PA) design challenges. / Lie, D. Y.C.; Mayeda, J. C.; Lopez, J.
2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 7939653 (2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Highly efficient 5G linear power amplifiers (PA) design challenges

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