Highly efficient 5G linear power amplifiers (PA) design challenges

D. Y.C. Lie, J. C. Mayeda, J. Lopez

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Scopus citations

Abstract

The incoming 5G revolution will dramatically increase the design complexity for handsets and communication infrastructures, demanding the RFIC and ASIC chipsets designers, network and system components vendors and telecom operators to provide viable 5G E2E (End-to-End) products and solutions before A.D. 2020. The broadband modulation bandwidth for RF transmitters (i.e., 250 MHz to above 1 GHz), stringent linearity, and power efficiency requirements at the cm-Wave/mm-Wave 5G frequencies will make it particularly challenging for highly efficient linear 5G power amplifier (PA) design. We will briefly address two major design challenges and solutions for 5G PA design here, namely the device technology choices and efficiency enhancement techniques.

Original languageEnglish
Title of host publication2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509039692
DOIs
StatePublished - Jun 5 2017
Event2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 - Hsinchu, Taiwan, Province of China
Duration: Apr 24 2017Apr 27 2017

Publication series

Name2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017

Conference

Conference2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
CountryTaiwan, Province of China
CityHsinchu
Period04/24/1704/27/17

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