Global-aware and multi-order context-based prefetching for high-performance processors

Yong Chen, Huaiyu Zhu, Philip C. Roth, Hui Jin, Xian He Sun

Research output: Contribution to journalArticlepeer-review

1 Scopus citations


Data prefetching is widely used in high-end computing systems to accelerate data accesses and to bridge the increasing performance gap between processor and memory. Context-based prefetching has become a primary focus of study in recent years due to its general applicability. However, current context-based prefetchers only adopt the context analysis of a single order, which suffers from low prefetching coverage and thus limits the overall prefetching effectiveness. Also, existing approaches usually consider the context of the address stream from a single instruction but not the context of the address stream from all instructions, which further limits the context-based prefetching effectiveness. In this study, we propose a new context-based prefetcher called the Global-aware and Multi-order Context-based (GMC) prefetcher. The GMC prefetcher uses multi-order, local and global context analysis to increase prefetching coverage while maintaining prefetching accuracy. In extensive simulation testing of the SPEC-CPU2006 benchmarks with an enhanced CMP$im simulator, the proposed GMC prefetcher was shown to outperform existing prefetchers and to reduce the data-access latency effectively. The average Instructions Per Cycle (IPC) improvement of SPEC CINT2006 and CFP2006 benchmarks with GMC prefetching was over 55% and 44% respectively.

Original languageEnglish
Pages (from-to)355-370
Number of pages16
JournalInternational Journal of High Performance Computing Applications
Issue number4
StatePublished - Nov 2011


  • CMP$im simulator
  • PIN
  • SPEC-CPU2006
  • bandwidth contention
  • cache pollution
  • context-based prefetching
  • data access delay
  • data intensive computing
  • high-end computing
  • memory hierarchy
  • prefetch degree
  • prefetch priority
  • prefetching
  • prefetching accuracy
  • prefetching coverage
  • processor architectures


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