TY - GEN
T1 - Extensive Examination of XOR Arbiter PUFs as Security Primitives for Resource-Constrained IoT Devices
AU - Mursi, Khalid T.
AU - Zhuang, Yu
AU - Alkatheiri, Mohammed Saeed
AU - Aseeri, Ahmad O.
PY - 2019/8
Y1 - 2019/8
N2 - Communication security is essential for the proper functioning of the Internet of Things. Traditional approaches that rely on cryptographic keys are vulnerable to side-channel attacks. Physical Unclonable Functions (PUFs), leveraging unavoidable and irreproducible variations of integrated circuits to produce responses unique for individual PUF devices, are emerging as promising candidates as security primitives to provide keyless solutions. Before a PUF can be adopted for real applications, the PUF must be thoroughly examined to understand its various properties for its application feasibility. In this paper, we study XOR PUFs for broad ranges of values for circuit architecture parameters. XOR PUFs have been extensively studied, and have been shown to be unable to withstand machine learning attacks for 64-bit XOR PUFs with less than ten component PUFs. Attack methods employed in existing studies need a large number of challenge-response pairs (CRPs), which are obtainable only if the PUF has an open access interface. When PUF-embedded devices equipped with mutual authentication or response obfuscating techniques, it is difficult for attackers to accumulate large numbers of CRPs. With only a small number of accumulated CRPs available to attackers, small size PUFs, like XOR PUFs with a small number of component PUFs and stages, may become resistant to machine learning attacks. Since smaller sizes mean less resource-demanding, it is worthwhile to examine such PUFs which have usually been considered unsafe against attacks. Such are thoughts that have been motivating us in this paper to explore the PUF performances for a wide range of values of the PUF architecture parameters.
AB - Communication security is essential for the proper functioning of the Internet of Things. Traditional approaches that rely on cryptographic keys are vulnerable to side-channel attacks. Physical Unclonable Functions (PUFs), leveraging unavoidable and irreproducible variations of integrated circuits to produce responses unique for individual PUF devices, are emerging as promising candidates as security primitives to provide keyless solutions. Before a PUF can be adopted for real applications, the PUF must be thoroughly examined to understand its various properties for its application feasibility. In this paper, we study XOR PUFs for broad ranges of values for circuit architecture parameters. XOR PUFs have been extensively studied, and have been shown to be unable to withstand machine learning attacks for 64-bit XOR PUFs with less than ten component PUFs. Attack methods employed in existing studies need a large number of challenge-response pairs (CRPs), which are obtainable only if the PUF has an open access interface. When PUF-embedded devices equipped with mutual authentication or response obfuscating techniques, it is difficult for attackers to accumulate large numbers of CRPs. With only a small number of accumulated CRPs available to attackers, small size PUFs, like XOR PUFs with a small number of component PUFs and stages, may become resistant to machine learning attacks. Since smaller sizes mean less resource-demanding, it is worthwhile to examine such PUFs which have usually been considered unsafe against attacks. Such are thoughts that have been motivating us in this paper to explore the PUF performances for a wide range of values of the PUF architecture parameters.
KW - FPGA
KW - IoT
KW - Machine Learning attack
KW - Security
KW - XOR Arbiter PUF
UR - http://www.scopus.com/inward/record.url?scp=85078780974&partnerID=8YFLogxK
U2 - 10.1109/PST47121.2019.8949070
DO - 10.1109/PST47121.2019.8949070
M3 - Conference contribution
T3 - 2019 17th International Conference on Privacy, Security and Trust, PST 2019 - Proceedings
BT - 2019 17th International Conference on Privacy, Security and Trust, PST 2019 - Proceedings
A2 - Ghorbani, Ali
A2 - Ray, Indrakshi
A2 - Lashkari, Arash Habibi
A2 - Zhang, Jie
A2 - Lu, Rongxing
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 17th International Conference on Privacy, Security and Trust, PST 2019
Y2 - 26 August 2019 through 28 August 2019
ER -