Energy and Area Efficient Three-Input XOR/XNORs with Systematic Cell Design Methodology

Tooraj Nikoubin, Mahdieh Grailoo, Changzhi Li

Research output: Contribution to journalArticlepeer-review

8 Scopus citations

Abstract

In this brief, we propose three efficient three-input XOR/XNOR circuits as the most significant blocks of digital systems with a new systematic cell design methodology (SCDM) in hybrid-CMOS logic style. SCDM, which is an extension of CDM, plays the essential role in designing efficient circuits. At first, it is deliberately given priority to general design goals in a base structure of circuits. This structure is generated systematically by employing binary decision diagram. After that, concerning high flexibility in design targets, SCDM aims to specific ones in the remaining three steps, which are wise selections of basic cells and amend mechanisms, as well as transistor sizing. In the end, the resultant three-input XOR/XNORs enjoy full-swing and fairly balanced outputs. They perform well with supply voltage scaling, and their critical path contains only two transistors. They also outperform their counterparts exhibiting 27%-77% reduction in average energy-delay product in HSPICE simulation based on TSMC 0.13-μm technology. The symmetric schematic topologies significantly simplify and minimize the layout, as 26%-32% improvement in area is demonstrated.

Original languageEnglish
Article number7067438
Pages (from-to)398-402
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume24
Issue number1
DOIs
StatePublished - Jan 2016

Keywords

  • Binary decision diagram applications
  • energy efficiency
  • hybrid-CMOS logic style
  • systematic design methodology
  • three-input XOR/XNOR circuits

Fingerprint Dive into the research topics of 'Energy and Area Efficient Three-Input XOR/XNORs with Systematic Cell Design Methodology'. Together they form a unique fingerprint.

Cite this