Dynamic CPU cache management under the loop model

Charif Jaouhar, Imad Mahgoub, Rattikorn Hewett

Research output: Contribution to conferencePaperpeer-review


Most recent cache designs use Least Recently Used (LRU) replacement strategy to provide the high performance required by modern fast CPUs. We propose a new replacement technique that uses some heuristic to detect loop structures in the reference patterns. Initially, the proposed technique uses the LRU strategy. Once a loop has been detected, all the references, which would result in poor performance if they were to be cached, will be dynamically excluded from being stored in the cache. The LRU strategy will resume as soon as the end of the loop has been detected. We have also developed a simulation program to compare the performance of this scheme to that of other related ones, so as to demonstrate its effectiveness. The results show our scheme outperforms the others when the system references are loop dominated.

Original languageEnglish
Number of pages6
StatePublished - 1995
EventProceedings of the 1995 Southcon Conference - Lauderdale, FL, USA
Duration: Mar 7 1995Mar 7 1995


ConferenceProceedings of the 1995 Southcon Conference
CityLauderdale, FL, USA


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