TY - JOUR
T1 - Demonstration of Constant-Gate-Charge Scaling to Increase the Robustness of Silicon Carbide Power MOSFETs
AU - Cooper, James A.
AU - Morisette, Dallas T.
AU - Sampath, Madankumar
AU - Stellman, Cheryl A.
AU - Bayne, Stephen B.
AU - Westphal, Michael J.
AU - Anderson, Clinton H.
AU - Ransom, John A.
N1 - Funding Information:
Manuscript received May 11, 2021; revised June 25, 2021; accepted July 13, 2021. Date of publication August 4, 2021; date of current version August 23, 2021. This work was supported in part by the Army Research Laboratory under Grant W911NF-15-2-0041, in part by the Advanced Research Projects Agency–Energy (ARPA-E) under Grant DE-AR0001009, and in part by the Department of Energy PowerAmerica Institute under Award 2014-0654-23. The review of this article was arranged by Editor T. Kimoto. (Corresponding author: James A. Cooper.) James A. Cooper is with Sonrisa Research, Inc., Santa Fe, NM 87506 USA (e-mail: cooperj@purdue.edu).
Publisher Copyright:
© 1963-2012 IEEE.
PY - 2021/9
Y1 - 2021/9
N2 - We introduce the concept of constant-gate-charge scaling to increase the short-circuit withstand time of SiC power MOSFETs without increasing their ON-state resistance, gate charge, or oxide field. In gate-charge scaling, we scale the oxide thickness and gate drive voltage, keeping the oxide field constant. Short-circuit measurements on 1200 V SiC double-implanted MOSFETs (DMOSFETs) confirm that short-circuit withstand times can be increased by 2- 4times without increasing ON-resistance, simply by reducing the oxide thickness and the gate drive voltage.
AB - We introduce the concept of constant-gate-charge scaling to increase the short-circuit withstand time of SiC power MOSFETs without increasing their ON-state resistance, gate charge, or oxide field. In gate-charge scaling, we scale the oxide thickness and gate drive voltage, keeping the oxide field constant. Short-circuit measurements on 1200 V SiC double-implanted MOSFETs (DMOSFETs) confirm that short-circuit withstand times can be increased by 2- 4times without increasing ON-resistance, simply by reducing the oxide thickness and the gate drive voltage.
KW - Saturation current
KW - specific on-resistance
UR - http://www.scopus.com/inward/record.url?scp=85112592875&partnerID=8YFLogxK
U2 - 10.1109/TED.2021.3099455
DO - 10.1109/TED.2021.3099455
M3 - Article
AN - SCOPUS:85112592875
SN - 0018-9383
VL - 68
SP - 4577
EP - 4581
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 9
M1 - 9506992
ER -