Core-aware memory access scheduling schemes

Zhibin Fang, Xian He Sun, Yong Chen, Surendra Byna

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

13 Scopus citations

Abstract

Multi-core processors have changed the conventional hardware structure and require a rethinking of system scheduling and resource management to utilize them efficiently. However, current multi-core systems are still using conventional single-core memory scheduling. In this study, we investigate and evaluate traditional memory access scheduling techniques, and propose a core-aware memory scheduling for multi-core environments. Since memory requests from the same source exhibit better locality, it is reasonable to schedule the requests by taking the source of the requests into consideration. Motivated from this principle of locality, we propose two core-aware policies based on traditional bank-first and row-first schemes. Simulation results show that the core-aware policies can effectively improve the performance. Compared with the bank-first and row-first policies, the proposed core-aware policies reduce the execution time of certain NAS Parallel Benchmarks by up to 20% in running the benchmarks separately, and by 11% in running them concurrently.

Original languageEnglish
Title of host publicationIPDPS 2009 - Proceedings of the 2009 IEEE International Parallel and Distributed Processing Symposium
DOIs
StatePublished - 2009
Event23rd IEEE International Parallel and Distributed Processing Symposium, IPDPS 2009 - Rome, Italy
Duration: May 23 2009May 29 2009

Publication series

NameIPDPS 2009 - Proceedings of the 2009 IEEE International Parallel and Distributed Processing Symposium

Conference

Conference23rd IEEE International Parallel and Distributed Processing Symposium, IPDPS 2009
Country/TerritoryItaly
CityRome
Period05/23/0905/29/09

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