TY - GEN
T1 - Analysis of SiC JFET devices during pulsed operation
AU - Lawson, K.
AU - Alvarez, G.
AU - Bayne, S.
AU - Veliadis, V.
AU - Urciuoli, D.
PY - 2011
Y1 - 2011
N2 - The purpose of this research is to investigate the performance of Silicon Carbide JFET for us in solid state circuit breakers. The device under test for these results is a research grade JFET with a rated blocking voltage of 1200V and a rated forward current of 10A with a power density of 200W/cm 2. In order to drive the JFET device, a unique gate driver had to be designed and built to provide switching between two independent rail voltages. The gate driver had to be able to provide adjustable rail voltages with one rail ranging between 0V and -40V and the other rail going between 0V and 2.5V. The gate driver is completely isolated to operate on a high-side switch. In order to test these devices in pulsed switching applications a pulse ring down circuit was designed and built to provide a current pulse of 100A (10 times the rated current) with a charging voltage range between 100V and 500V. Special consideration had to be given to the design of this pulse ring down circuit in order to achieve a high di/dt, and therefore reach the target peak current levels.
AB - The purpose of this research is to investigate the performance of Silicon Carbide JFET for us in solid state circuit breakers. The device under test for these results is a research grade JFET with a rated blocking voltage of 1200V and a rated forward current of 10A with a power density of 200W/cm 2. In order to drive the JFET device, a unique gate driver had to be designed and built to provide switching between two independent rail voltages. The gate driver had to be able to provide adjustable rail voltages with one rail ranging between 0V and -40V and the other rail going between 0V and 2.5V. The gate driver is completely isolated to operate on a high-side switch. In order to test these devices in pulsed switching applications a pulse ring down circuit was designed and built to provide a current pulse of 100A (10 times the rated current) with a charging voltage range between 100V and 500V. Special consideration had to be given to the design of this pulse ring down circuit in order to achieve a high di/dt, and therefore reach the target peak current levels.
UR - http://www.scopus.com/inward/record.url?scp=84861381276&partnerID=8YFLogxK
U2 - 10.1109/PPC.2011.6191651
DO - 10.1109/PPC.2011.6191651
M3 - Conference contribution
AN - SCOPUS:84861381276
SN - 9781457706295
T3 - Digest of Technical Papers-IEEE International Pulsed Power Conference
SP - 1102
EP - 1104
BT - IEEE Conference Record - PPC 2011, Pulsed Power Conference 2011
Y2 - 19 June 2011 through 23 June 2011
ER -