An 8-bit single-ended ultra-low-power successive approximation register (SAR) ADC with a novel DAC switching method is designed and fabricated in a 0.35-μm BCD (bipolar-CMOS-DMOS) technology. The switching method uses V R/2, rather than V R, as the only reference voltage to digitize the input signals with the amplitude range of (0, V R). The scheme is also compared with other switching methods in MATLAB. Compared with the conventional switching method, the proposed design reduces the average power consumption in the DAC during digitizing by 87.5%. Measurement results show that at the power supply of 1.4 V and the reference voltage of 1 V and with the sampling rate of 2 kS/s, the ADC can digitize the input signal with a full-scale range of 2 V, resulting in a signal-to-noise-and-distortion ratio (SNDR) of 48.2 dB at the frequencies larger than its Nyquist bandwidth (1 kHz). It consumes 101 nW and reaches a figure of merit of 227 fJ/(conversion-step). The ADC is targeted to be used as part of the ultra-lowpower analog front-end circuit of an implantable cardioverter defibrillator (ICD).
|Number of pages||4|
|State||Published - 2012|
|Event||2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of|
Duration: May 20 2012 → May 23 2012
|Conference||2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012|
|Country/Territory||Korea, Republic of|
|Period||05/20/12 → 05/23/12|