TY - GEN
T1 - A taxonomy of data prefetching mechanisms
AU - Byna, Surendra
AU - Chen, Yong
AU - Sun, Xian He
PY - 2008
Y1 - 2008
N2 - Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been proposed in the last few years to reduce data access latency by taking advantage of multi-core architectures. In this paper, we propose a taxonomy that classifies various design concerns in developing a prefetching strategy. We discuss various prefetching strategies and issues that have to be considered in designing a prefetching strategy for multi-core processors.
AB - Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardware and/or software support, data prefetching brings data closer to a processor before it is actually needed. Many prefetching techniques have been proposed in the last few years to reduce data access latency by taking advantage of multi-core architectures. In this paper, we propose a taxonomy that classifies various design concerns in developing a prefetching strategy. We discuss various prefetching strategies and issues that have to be considered in designing a prefetching strategy for multi-core processors.
UR - http://www.scopus.com/inward/record.url?scp=49149107760&partnerID=8YFLogxK
U2 - 10.1109/I-SPAN.2008.24
DO - 10.1109/I-SPAN.2008.24
M3 - Conference contribution
AN - SCOPUS:49149107760
SN - 9780769531250
T3 - Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN
SP - 19
EP - 24
BT - Proceedings - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008
T2 - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008
Y2 - 7 May 2008 through 9 May 2008
ER -