This paper shows a highly-efficient SiGe power amplifier (PA) design where its linearity, power-added efficiency (PAE) and POUT are studied vs. different LTE 16QAM signal BW and supply voltage. The monolithic PA, designed in 0.35-μm SiGe BiCMOS technology with through-silicon via (TSV) using continuous wave (CW) load-pull, passes the stringent LTE spectrum emission mask (SEM) at average linear POUT = 23.5/23.1/23.1 dBm with 48.0/45.2/45.0% PAE for LTE 5/10/20 MHz inputs. The adjacent channel leakage ratios ACLR1/ACLR2 exhibit opposite trends vs. increasing signal BW at POUT below compression (P1dB = 22.3 dBm), while past compression ACLR1/ACLR2 increase with larger BW, with some ACLR2 asymmetry at 10/20 MHz. Lowering the supply voltage has a larger effect on ACLR degradation than higher signal BW. The data suggests that static CW load-pull data is useful for PA design even for 16QAM modulated signal but cannot accurately predict SiGe PA's linearity performance.