In this paper, a fully differential cascode power amplifier (PA) is designed and fabricated using a 0.35-μm SiGe BiCMOS process. In the continuous wave (CW) measurement, the PA achieves a saturated power (P SAT) of 24.8 dBm at 3.3 V with power-added-efficiency (PAE) above 50% at 2.3 GHz. Two monolithic envelope modulators (EMs) are designed in a 0.18-μm SOI CMOS technology using a switching buck converter stage with two different linear amplifier topologies: a low-dropout (LDO) regulator vs. a conventional class AB Op-Amp. The envelope tracking PA (ET-PA) systems are measured for maximum linear POUT and efficiency with corresponding design trade-offs discussed. The conventional class AB Op-Amp based EM proved better combined efficiency /linearity at 20 dBm POUT with 30% PAE using an LTE 16QAM 5 MHz signal for our assessment.