A parallel implementation of the COLUMBUS multireference configuration interaction program

In this work a parallel implementation of the COLUMBUS MRSDCI program system is presented. A coarse grain parallelization approach using message passing via the portable toolkit TCGMSG is used. The program is very well portable and runs on shared memory machines like the Cray Y-MP, Alliant FX/2800 or Convex C2 and on distributed memory machines like the iPSC/860. Further implementations on a network of workstations and on the Intel Touchstone Delta are in progress. Overall, results are quite satisfactory considering the complexity and the prodigious requirements, especially the I/O bandwidth, of MRCI programs in general. For our largest test case we obtain a speedup of a factor of 7.2 on an eight processor Cray Y-MP for that section of the program (hamiltonian matrix times trial vector product) which has been parallelized. The speedup for one complete diagonalization iteration amounts to 5.9. An absolute speed close to 1 GFLOPS is found. Results for the iPSC/860 show that ordinary disk I/O is certainly not sufficient in order to guarantee a satisfactory performance. As a solution for that problem, the implementation of a fully asynchronous distributed-memory model for certain data files is in preparation.