A W-CDMA direct-conversion front-end receiver chip consisting of a low-noise amplifier (LNA), a dual-gain RF variable-gain amplifier (RF-VGA), two direct-down-conversion mixers, a I/Q quadrature generator, and a base-band five-gain-stage VGA is designed and manufactured in a 0.25μm IBM SiGe BiCMOS production process. A very low DC offset value (<300 μV) is measured at the output of the mixers as the LO signal is fed into the chip at twice the RF frequency. An extremely low local oscillator (LO) leakage of -105 dBm is measured at the LNA input, partly due to the excellent LO-to-RF isolation provided by the RF-VGA and the direct-conversion mixers. The measured cascaded noise figure for the chip (including the SAW filter) is 4.3 dB at the maximum gain mode, and the IIP2 and IIP3 are +37 and 16.5 dBm, respectively. The I/Q channels exhibit a small mismatch in magnitude (<0.1 dB) and in phase (1°-1.5°). The chip draws 24.9 mA from a 2.85 V supply. The overall chip performance meets all the essential parameters of W-CDMA receiver front-end specs.
|Number of pages||4|
|State||Published - 2002|
|Event||2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Seatle, WA, United States|
Duration: Jun 2 2002 → Jun 4 2002
|Conference||2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium|
|Period||06/2/02 → 06/4/02|