A direct-conversion W-CDMA front-end SiGe receiver chip

D. Y.C. Lie; J. Kennedy; D. Livezey; B. Yang; T. Robinson; N. Sornin; T. Beukema; L. E. Larson; A. Senior; C. Saint; J. Blonski; N. Swanberg; P. Pawlowski; D. Gonya; X. Yuan; H. Zamat

A direct-conversion W-CDMA front-end SiGe receiver chip

D. Y.C. Lie, J. Kennedy, D. Livezey, B. Yang, T. Robinson, N. Sornin, T. Beukema, L. E. Larson, A. Senior, C. Saint, J. Blonski, N. Swanberg, P. Pawlowski, D. Gonya, X. Yuan, H. Zamat

Electrical and Computer Engineering

Research output: Contribution to conference › Paper › peer-review

13 Scopus citations

Abstract

A W-CDMA direct-conversion front-end receiver chip consisting of a low-noise amplifier (LNA), a dual-gain RF variable-gain amplifier (RF-VGA), two direct-down-conversion mixers, a I/Q quadrature generator, and a base-band five-gain-stage VGA is designed and manufactured in a 0.25μm IBM SiGe BiCMOS production process. A very low DC offset value (<300 μV) is measured at the output of the mixers as the LO signal is fed into the chip at twice the RF frequency. An extremely low local oscillator (LO) leakage of -105 dBm is measured at the LNA input, partly due to the excellent LO-to-RF isolation provided by the RF-VGA and the direct-conversion mixers. The measured cascaded noise figure for the chip (including the SAW filter) is 4.3 dB at the maximum gain mode, and the IIP2 and IIP3 are +37 and 16.5 dBm, respectively. The I/Q channels exhibit a small mismatch in magnitude (<0.1 dB) and in phase (1°-1.5°). The chip draws 24.9 mA from a 2.85 V supply. The overall chip performance meets all the essential parameters of W-CDMA receiver front-end specs.

Original language	English
Pages	31-34
Number of pages	4
State	Published - 2002
Event	2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Seatle, WA, United States Duration: Jun 2 2002 → Jun 4 2002

Conference

Conference	2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
Country/Territory	United States
City	Seatle, WA
Period	06/2/02 → 06/4/02

Cite this

Lie, D. Y. C., Kennedy, J., Livezey, D., Yang, B., Robinson, T., Sornin, N., Beukema, T., Larson, L. E., Senior, A., Saint, C., Blonski, J., Swanberg, N., Pawlowski, P., Gonya, D., Yuan, X., & Zamat, H. (2002). A direct-conversion W-CDMA front-end SiGe receiver chip. 31-34. Paper presented at 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Seatle, WA, United States.

@conference{d6c3a96c1fcf4c249acfcc0605abd6bf,

title = "A direct-conversion W-CDMA front-end SiGe receiver chip",

abstract = "A W-CDMA direct-conversion front-end receiver chip consisting of a low-noise amplifier (LNA), a dual-gain RF variable-gain amplifier (RF-VGA), two direct-down-conversion mixers, a I/Q quadrature generator, and a base-band five-gain-stage VGA is designed and manufactured in a 0.25μm IBM SiGe BiCMOS production process. A very low DC offset value (<300 μV) is measured at the output of the mixers as the LO signal is fed into the chip at twice the RF frequency. An extremely low local oscillator (LO) leakage of -105 dBm is measured at the LNA input, partly due to the excellent LO-to-RF isolation provided by the RF-VGA and the direct-conversion mixers. The measured cascaded noise figure for the chip (including the SAW filter) is 4.3 dB at the maximum gain mode, and the IIP2 and IIP3 are +37 and 16.5 dBm, respectively. The I/Q channels exhibit a small mismatch in magnitude (<0.1 dB) and in phase (1°-1.5°). The chip draws 24.9 mA from a 2.85 V supply. The overall chip performance meets all the essential parameters of W-CDMA receiver front-end specs.",

author = "Lie, {D. Y.C.} and J. Kennedy and D. Livezey and B. Yang and T. Robinson and N. Sornin and T. Beukema and Larson, {L. E.} and A. Senior and C. Saint and J. Blonski and N. Swanberg and P. Pawlowski and D. Gonya and X. Yuan and H. Zamat",

year = "2002",

language = "English",

pages = "31--34",

note = "null ; Conference date: 02-06-2002 Through 04-06-2002",

}

Lie, DYC, Kennedy, J, Livezey, D, Yang, B, Robinson, T, Sornin, N, Beukema, T, Larson, LE, Senior, A, Saint, C, Blonski, J, Swanberg, N, Pawlowski, P, Gonya, D, Yuan, X & Zamat, H 2002, 'A direct-conversion W-CDMA front-end SiGe receiver chip', Paper presented at 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Seatle, WA, United States, 06/2/02 - 06/4/02 pp. 31-34.

TY - CONF

T1 - A direct-conversion W-CDMA front-end SiGe receiver chip

AU - Lie, D. Y.C.

AU - Kennedy, J.

AU - Livezey, D.

AU - Yang, B.

AU - Robinson, T.

AU - Sornin, N.

AU - Beukema, T.

AU - Larson, L. E.

AU - Senior, A.

AU - Saint, C.

AU - Blonski, J.

AU - Swanberg, N.

AU - Pawlowski, P.

AU - Gonya, D.

AU - Yuan, X.

AU - Zamat, H.

PY - 2002

Y1 - 2002

N2 - A W-CDMA direct-conversion front-end receiver chip consisting of a low-noise amplifier (LNA), a dual-gain RF variable-gain amplifier (RF-VGA), two direct-down-conversion mixers, a I/Q quadrature generator, and a base-band five-gain-stage VGA is designed and manufactured in a 0.25μm IBM SiGe BiCMOS production process. A very low DC offset value (<300 μV) is measured at the output of the mixers as the LO signal is fed into the chip at twice the RF frequency. An extremely low local oscillator (LO) leakage of -105 dBm is measured at the LNA input, partly due to the excellent LO-to-RF isolation provided by the RF-VGA and the direct-conversion mixers. The measured cascaded noise figure for the chip (including the SAW filter) is 4.3 dB at the maximum gain mode, and the IIP2 and IIP3 are +37 and 16.5 dBm, respectively. The I/Q channels exhibit a small mismatch in magnitude (<0.1 dB) and in phase (1°-1.5°). The chip draws 24.9 mA from a 2.85 V supply. The overall chip performance meets all the essential parameters of W-CDMA receiver front-end specs.

AB - A W-CDMA direct-conversion front-end receiver chip consisting of a low-noise amplifier (LNA), a dual-gain RF variable-gain amplifier (RF-VGA), two direct-down-conversion mixers, a I/Q quadrature generator, and a base-band five-gain-stage VGA is designed and manufactured in a 0.25μm IBM SiGe BiCMOS production process. A very low DC offset value (<300 μV) is measured at the output of the mixers as the LO signal is fed into the chip at twice the RF frequency. An extremely low local oscillator (LO) leakage of -105 dBm is measured at the LNA input, partly due to the excellent LO-to-RF isolation provided by the RF-VGA and the direct-conversion mixers. The measured cascaded noise figure for the chip (including the SAW filter) is 4.3 dB at the maximum gain mode, and the IIP2 and IIP3 are +37 and 16.5 dBm, respectively. The I/Q channels exhibit a small mismatch in magnitude (<0.1 dB) and in phase (1°-1.5°). The chip draws 24.9 mA from a 2.85 V supply. The overall chip performance meets all the essential parameters of W-CDMA receiver front-end specs.

UR - http://www.scopus.com/inward/record.url?scp=0036312863&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0036312863

SP - 31

EP - 34

Y2 - 2 June 2002 through 4 June 2002

ER -

A direct-conversion W-CDMA front-end SiGe receiver chip

Abstract

Conference

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